
ALLIANCE MEMORY AS4C32M16SB-7TIN DRAM, SDRAM, 512 Mbit, 32M x 16bit, 143 MHz, TSOP-II, 54 Pins
ALLIANCE MEMORY AS4C32M16SB-7TIN DRAM, SDRAM, 512 Mbit, 32M x 16bit, 143 MHz, TSOP-II, 54 Pins
Product Overview
AS4C32M16SB-7TIN 512Mb SDRAM is a high-speed CMOS synchronous DRAM containing 512Mbits. It is internally configured as 4 Banks of 8M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a bank activate command which is then followed by a read or write command. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either auto or self refresh are easy to use. By having a programmable mode register, the system can choose most suitable modes to maximize its performance. It is well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications.
- Fully synchronous operation, internal pipelined architecture, 8M word x 16-bit x 4-bank
- Programmable mode registers, CAS latency: 2 or 3, burst length: 1, 2, 4, 8, or full page
- Burst type: sequential or interleaved, burst stop function
- Auto refresh and self refresh, 8192 refresh cycles/64ms
- CKE power down mode, single +3.3V ±0.3V power supply
- LVTTL interface
- 143MHz frequency
- 54 Pin TSOP II package
- Industrial temperature range from -40°C to 85°C
Product details
Other details
| Brand | ALLIANCE MEMORY |
| Part Number | AS4C32M16SB-7TIN |
| Quantity | Each |
| Technical Data Sheet EN |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.
Original: $39.66
-70%$39.66
$11.90ALLIANCE MEMORY AS4C32M16SB-7TIN DRAM, SDRAM, 512 Mbit, 32M x 16bit, 143 MHz, TSOP-II, 54 Pins
Product Overview
AS4C32M16SB-7TIN 512Mb SDRAM is a high-speed CMOS synchronous DRAM containing 512Mbits. It is internally configured as 4 Banks of 8M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a bank activate command which is then followed by a read or write command. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either auto or self refresh are easy to use. By having a programmable mode register, the system can choose most suitable modes to maximize its performance. It is well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications.
- Fully synchronous operation, internal pipelined architecture, 8M word x 16-bit x 4-bank
- Programmable mode registers, CAS latency: 2 or 3, burst length: 1, 2, 4, 8, or full page
- Burst type: sequential or interleaved, burst stop function
- Auto refresh and self refresh, 8192 refresh cycles/64ms
- CKE power down mode, single +3.3V ±0.3V power supply
- LVTTL interface
- 143MHz frequency
- 54 Pin TSOP II package
- Industrial temperature range from -40°C to 85°C
Product details
Other details
| Brand | ALLIANCE MEMORY |
| Part Number | AS4C32M16SB-7TIN |
| Quantity | Each |
| Technical Data Sheet EN |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.
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Product Information
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Description
Product Overview
AS4C32M16SB-7TIN 512Mb SDRAM is a high-speed CMOS synchronous DRAM containing 512Mbits. It is internally configured as 4 Banks of 8M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock signal, CLK). Read and write accesses to SDRAM are burst oriented; accesses start at a selected location and continue for a programmed number of locations in a programmed sequence. Accesses begin with the registration of a bank activate command which is then followed by a read or write command. An auto precharge function may be enabled to provide a self-timed row precharge that is initiated at the end of the burst sequence. The refresh functions, either auto or self refresh are easy to use. By having a programmable mode register, the system can choose most suitable modes to maximize its performance. It is well suited for applications requiring high memory bandwidth and particularly well suited to high performance PC applications.
- Fully synchronous operation, internal pipelined architecture, 8M word x 16-bit x 4-bank
- Programmable mode registers, CAS latency: 2 or 3, burst length: 1, 2, 4, 8, or full page
- Burst type: sequential or interleaved, burst stop function
- Auto refresh and self refresh, 8192 refresh cycles/64ms
- CKE power down mode, single +3.3V ±0.3V power supply
- LVTTL interface
- 143MHz frequency
- 54 Pin TSOP II package
- Industrial temperature range from -40°C to 85°C
Product details
Other details
| Brand | ALLIANCE MEMORY |
| Part Number | AS4C32M16SB-7TIN |
| Quantity | Each |
| Technical Data Sheet EN |
All product and company names are trademarks™ or registered® trademarks of their respective holders. Use of them does not imply any affiliation with or endorsement by them.





